In the semiconductor integrated circuit (IC) industry, technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing.
One process commonly used in semiconductor fabrication is photolithography. Photolithography involves depositing a photoresist onto a substrate. The photoresist is then exposed to a light source through a photomask. Depending on the type of photoresist, either the exposed portions are unexposed portions of the photoresist are removed in a development process. The remaining photoresist features may then act as a mask for further processes. For example, and implantation process may then be applied to the substrate. Such implanting process will only be applied to portions of the substrate not covered by the remaining photoresist features. Due to the small scale of such features, it is desirable to improve the accuracy of the photolithography process.